Evaluating FPGA Acceleration with Intel ® oneAPI Toolkit for High-Speed Data Processing

¹ CERN, Geneva, Switzerland
² Aix Marseille Univ, CNRS/IN2P3, CPPM, Marseille, France
³ University of Thessaly, Volos, Greece

^* e-mail: alberto.perro@cern.ch

Published online: 7 October 2025

Abstract

The LHCb Experiment employs GPU cards in its first level trigger system to enhance computing efficiency, achieving a data rate of 32 Tb/s from the detector. GPUs were selected for their computational power, parallel processing capabilities, and adaptability.

However, trigger tasks necessitate extensive combinatorial and bitwise operations, ideally suited for FPGA implementation. Yet, FPGA adoption for compute acceleration is hindered by steep learning curves and very different programming paradigms with respect to GPUs and CPUs. In the last few years, interest in high level synthesis has grown because of the possibility of developing FPGA gateware in higher-level languages.

This study assesses the Intel® oneAPI FPGA Toolkit, which aims to simplify the development of FPGA-accelerated workloads by offering a GPU-like programming framework. We detail the integration of a portion of the current pixel clustering algorithm into oneAPI, address common implementation challenges, and compare it against CPU, GPU, and RTL implementations.

Our findings showcase promising outcomes for this emerging technology, potentially facilitating the repurposing of FPGAs in the data acquisition system as compute accelerators during idle data-taking periods.