Graphics Processors in HEP Low-Level Trigger Systems

¹ INFN Sezione di Roma Tor Vergata, Italy
² INFN Sezione di Roma, Italy
³ INFN Sezione di Pisa, Italy
⁴ Università di Pisa, Italy
⁵ INFN Sezione di Ferrara, Italy
⁶ Università di Ferrara, Italy
⁷ NVIDIA Corp., Santa Clara, CA, USA
⁸ INFN Laboratori Nazionali di Frascati, Italy

^a e-mail: luca.pontisso@pi.infn.it

Published online: 15 November 2016

Abstract

Usage of Graphics Processing Units (GPUs) in the so called general-purpose computing is emerging as an effective approach in several fields of science, although so far applications have been employing GPUs typically for offline computations. Taking into account the steady performance increase of GPU architectures in terms of computing power and I/O capacity, the real-time applications of these devices can thrive in high-energy physics data acquisition and trigger systems. We will examine the use of online parallel computing on GPUs for the synchronous low-level trigger, focusing on tests performed on the trigger system of the CERN NA62 experiment. To successfully integrate GPUs in such an online environment, latencies of all components need analysing, networking being the most critical. To keep it under control, we envisioned NaNet, an FPGA-based PCIe Network Interface Card (NIC) enabling GPUDirect connection. Furthermore, it is assessed how specific trigger algorithms can be parallelized and thus benefit from a GPU implementation, in terms of increased execution speed. Such improvements are particularly relevant for the foreseen Large Hadron Collider (LHC) luminosity upgrade where highly selective algorithms will be essential to maintain sustainable trigger rates with very high pileup.