| Issue |
EPJ Web Conf.
Volume 245, 2020
24th International Conference on Computing in High Energy and Nuclear Physics (CHEP 2019)
|
|
|---|---|---|
| Article Number | 10001 | |
| Number of page(s) | 7 | |
| Section | 10 - Crossover sessions from online, offline and exascale | |
| DOI | https://doi.org/10.1051/epjconf/202024510001 | |
| Published online | 16 November 2020 | |
https://doi.org/10.1051/epjconf/202024510001
Reconstruction of track candidates at the LHC crossing rate using FPGAs
Universitá di Pisa and INFN-Pisa, Largo Bruno Pontecorvo 3, Pisa (IT)
* e-mail: giulia.tuci@cern.ch
Published online: 16 November 2020
In 2021 the LHCb experiment will be upgraded, and the DAQ system will be based on full reconstruction of events, at the full LHC crossing rate. This requires an entirely new system, capable of reading out, building and reconstructing events at an average rate of 30 MHz. In facing this challenge, the system could take advantage of a fast pre-processing of data on dedicated FPGAs. The results of an R&D on these technologies, developed in the context of the LHCb Upgrade I, are presented in this document. In particular, the details and potential benefits of an approach based on producing in real-time sorted collections of hits in the VELO detector (pre-tracks) are discussed. These pre-processed data can then be used as seeds by the High Level Trigger (HLT) farm to find tracks for the Level 1 trigger with much lower computational effort than possible by starting from the raw detector data, thus freeing an important fraction of the power of the CPU farm for higher level processing tasks.
© The Authors, published by EDP Sciences, 2020
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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