Atomistic Modeling and Visualization of MoS₂-Based GFNCFET with h-BN and Ferroelectric Gate for Ultra-Low Power Applications

¹ Department of ECE, Sathyabama Institute of Science and Technology, Chennai, India
² Center for Nanoscience and Nanotechnology, Sathyabama Institute of Science and Technology, Chennai, India

Published online: 10 March 2026

Abstract

This paper presents a MoS2-based Gate-All-Around Ferroelectric Negative Capacitance FET (GFNCFET) with h-BN dielectric and HZO ferroelectric gate for ultra-low power electronics. TCAD simulations demonstrate minimum subthreshold swing of 81.6 mV/dec approaching the thermal limit of conventional MOSFET operation, with voltage amplification factor of 1.02 confirming negative capacitance operation. The device exhibits 12-decade current modulation (10⁻¹² to 10⁻² A) with on/off ratio exceeding 10¹⁰. Ferroelectric characterization reveals remnant polarization of 0.30 C/m² with characteristic S-shaped Landau hysteresis. The gate-all-around architecture with atomically thin MoS₂ achieves DIBL of 28 mV/V. Results validate GFNCFET as a promising architecture for energy-efficient post-CMOS electronics.