Fast and resource-efficient Deep Neural Network on FPGA for the Phase-II Level-0 muon barrel trigger of the ATLAS experiment

Dipartimento di Fisica, Sapienza Università di Roma and INFN Sezione di Roma, Roma, IT

^* e-mail: stefano.giagu@roma1.infn.it
Copyright 2020 CERN for the benefit of the ATLAS Collaboration. CC-BY-4.0 license.

Published online: 16 November 2020

Abstract

The Level-0 muon trigger system of the ATLAS experiment will undergo a full upgrade for the High Luminosity LHC to stand the challenging requirements imposed by the increase in instantaneous luminosity. The upgraded trigger system will send raw hit data to off-detector processors, where trigger algorithms run on a new generation of FPGAs. To exploit the flexibility provided by the FPGA systems, ATLAS is developing novel precision deep neural network architectures based on trained ternary quantisation, optimised to run on FPGAs for efficient reconstruction and identification of muons in the ATLAS “Level-0” trigger. Physics performance in terms of efficiency and fake rates and FPGA logic resource occupancy and timing obtained with the developed algorithms are discussed.